Arm Processer for Computer Architecture Essay

1460 Words Nov 8th, 2012 6 Pages
Subject: The use of the ARM processor as an instruction tool for Computer Architecture Class
Journal Article Title: Arms for the Poor: Selecting a Processor for Teaching Computer Architecture
Author: Alan Clements

When an individual chooses to become a teacher, professor, or some sort of instructor, he or she will become subject to one of the most primitive questions ever asked in the history of civilization: “Why?” However, generally speaking when a student asks the question “Why?” it is not for a genuine thirst for knowledge or explanation. It is not like a child who wants to know why the sky is blue, or why dogs can’t talk. A students real interpretation
…show more content…
However, at the same time de-motivates the student based on the difficulty to absorb the material without something tangible for the student to learn with, and ultimately shows the reason for improvement. When it comes to computer architecture there is a tool that takes the best of both responses and creates one credible answer. That tool is the ARM processor. Computer Architecture is a key component of a degree in Computer Science and itself consists of several core areas of curriculum shown in the two tables below, provided by the joint ACM IEEE Computer Society Computing Curriculum.

Key Components of Computer Architecture Curriculum | Expanded Computer Architecture Curriculum or the Core | Digital logic and computer arithmeticComputer architectureInterfacing and communicationMemory system organization and architectureFunctional organizationMultiprocessing and alternative architecturesPerformance accelerationArchitecture for networks and distributed systemsDevices; New directions in computing | 1. Overview of the history of the digital computer2. Introduction to instruction set architecture, microarchitecture andsystem architecture3. Processor architecture – instruction types, register sets, addressingmodes4. Processor structures – memory-to-register and load/store architectures5. Instruction sequencing, flow-of-control, subroutine

Related Documents